Motivation 
There are no easy ways for software programmers to design both “hard” and “soft” components of an embedded system in common software based high level programming languages - like Java or C, working in a standard software programming environment and without requiring deep knowledge of hardware design issues e.g. hardware programming languages. 

Solution
Patent pending technology takes software programs written in C or Java and generates low foot print executables without requiring programmers to possess any significant knowledge of embedded design.  
    
Features and Benefits 
Distinctive features and benefits of our automated conversion to soft chips include:

Soft Chips technology: analyses program output machine code and generates a small footprint C code created, with identified essential system services fused with it.  Benefits: Rapid embedded software development; Algorithms are validated in a standard programming environment; lower resource overheads for device; No OS licensing; use low cost, low power 8/16 bit processors. 

Multiple Soft Chips: Further performance gains are achieved with extension to our soft chips technology. Should one CPU be insufficient, we can analyze the software to determine if program threads are separable to be able to run on multiple processors. We then generate soft chips - OS-less executables - for the threads, taking care to include thread synchronization mechanisms etc. 

Software centric: Soft chips technology is thus a software centric approach to deploying software more cost effectively on one or more processors to engender the highest possible performance at the lowest cost, while still staying in a software centric paradigm. The technology is applicable to a wide variety of host processors, both general purpose processors and custom processors. 

Custom Processors: In the case of custom processors the soft chips development framework helps analyze the type of instruction sets best needed to run the program thread most efficiently. It can also help generate the minimal set of macro instructions that the custom processor would need to run this program. Based on this information, the hardware designer can now present to the customer alternatives regarding custom processor design vs. using standard commercially available processor cores. 

Custom Instructions: ACG supports internally developed hardware logic for a representative instruction set. These hardware logic instructions may be combined with other instructions to create new macro instructions. Macro instructions compress the number of fetch-execute cycles to one, dramatically increasing the performance.  Selecting the type of instruction sets needed and the level of granularity (e.g. combination of instructions) is driven by flexibility and performance trade-offs specific to the application.  
 
Cost Effective Migration: Our Eclipse based framework supports deployment alternatives with easy migration from small footprint “soft” chips running on one processor to multiple soft chips running on multiple processors - that may also include higher performance custom processor packages. Benefits: Cost effective life cycle support for high performance embedded systems, working with one standard "programmer-friendly" framework.

See also: White Paper.  For more information, please contact: fdacosta@advancedcybernetics.com